Michael Doornbos
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Rated at 11.5 and puts out 11.9 under no load. Not bad for 41 years old. #commodore

▸ May 18, 2022 ▸ Michael Doornbos ▸ 0 words

← Progress this morning before the day job kicks in: I have an externally clocked VIC-20! Internal timing being driven my an ICE40 FPGA. It’s a couple cycles slow but getting there. Now to start on video signals. The math makes my brain hurt. More coffee #commodore #vicsrevenge First time I've used this modeling software and was impressed. Working out NTSC Luminance timing logic is a big help after just a couple mins. 100Mhz clock on the FPGA so we can just count nanoseconds. Can export to Verilog after simulation. Most excellent #commodore #vicsrevenge →
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